This project is funded by the 7th Framework Programme of the EC This project is funded by the 7th Framework Programme of the EC
The EuroPIC project is coordinated by COBRA The EuroPIC project is coordinated by COBRA
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Generic Platform Technology Development: A breakthrough in Photonic Integration

Photonic Integrated Circuits (PICs) are considered as the way to make photonic systems or subsystems cheap and ubiquitous. However, PICs still are several orders of magnitude more expensive than their microelectronic counterparts, and this has restricted their application to a few niche markets. EuroPIC targets a novel approach in photonic integration which will reduce the R&D costs of PICs by more than a factor of ten. It will bring the application of PICs that integrate complex and advanced photonic functionality on a single chip within reach for a large number of small and larger companies. Europe presently has a world state-of-the-art position and is leading in this novel approach.

Moore's law in Photonic

Figure 1 shows the complexity development of optical chips for application in Wavelength Division Multiplexing telecommunication systems, the technology that enabled worldwide high-speed internet and that is a major driver for photonic integration. The complexity is measured as the number of optical components per chip. Most points shown in the figure can be traced in earlier publications [1,2]. Figure 2 shows an early example of such a chip: an optical cross-connect (OXC) that can switch the four wavelength signals in both input ports independently between the two output ports. The chip, integrates two wavelength demultiplexers with 16 optical switches on a chip area of 8x12mm2. The most complex chip reported today is a WDM-transmitter chip which integrates 40 wavelength channels, each of them containing a laser, a modulator, a power monitor and a channel equalizer [3].

moores_law

Figure 1: Component count in reported InP photonic integrated circuits over time. The green (analogue) and red (digital) lines are projections discussed it the text.

Figure 1 shows a clear exponential trend, similar to Moore’s law in electronics, which suggests that Photonics is following the same process-driven development path as microelectronics, albeit at a slower pace and with a 30 years time shift. Probably this trend is in response to the very same developments in process equipment which are driving Moore’s Law in Silicon technology. There is an important difference, however. The Micro-electronic ICs which support the relationship in Moore’s Law are commercially applied devices, whereas most of the complex Photonic ICs are research devices which ended in published work but did not make the transition to the marketplace. The only truly complex chip which is currently applied in a commercial product is the WDM transmitter chip (10x10 Gb/s) of the US company Infinera [3], used in a 100Gb/s WDM system. It is the first demonstration that complex PICs can provide a competitive edge in a commercial environment.

optical_cross

Figure 2: An optical cross-connect (OXC) chip that can switch 4 wavelength channels independently from two input waveguides to two output guides. It integrates 2 wavelength demultiplexers with 16 optical switches on a chip area of 8x12mm2 .

What went wrong?

It is an interesting question why so few of the advanced PICs reported in the literature have made it to the market, despite the fact that in the last two decades several billion dollars have been invested in development of integration technologies in national and international projects in Europe, America and the Far East. The main reason is that they are too expensive to compete with other technologies like micro-optic or hybrid integration. The problem with current project funding models within Europe is that they tie the technology development closely to an application: you get no money without a clear and challenging application. In order to meet the challenging specifications the technology has to be fully optimized for that application and, as a result, we have almost as many technologies as applications. Due to this huge fragmentation, the market for these specific technologies is usually too small to justify their further development into the industrial volume manufacturing process that would really lead to low chip costs. This is quite different from the situation in micro-electronics where a huge market is served by a relatively small set of integration technologies (most of them CMOS technologies), and most of the technologies are used for a wide variety of applications. In this way the development costs of the integration process are shared by a large number of applications and the volume of all applications together is sufficiently large to justify the development of a sophisticated industrial manufacturing facility for large volume production, which combines high performance with low fabrication costs.

The solution to the problem described above seems obvious: we should introduce to photonics the methodology that allowed microelectronics to change the world. It is amazing that in photonics we are still developing expensive application specific technologies with poor market perspectives instead of developing low-cost Application Specific Photonic ICs in generic integration technologies that can serve a wide variety of applications and have much better market perspectives.

Some Definitions

The generic integration approach is expected to lead to a dramatic reduction of the costs of Photonic ICs, and a significant reduction of the number of design cycles needed to come to a satisfactory device. This is mainly due to the fact that it offers access to a well characterized process, rather than simply a cleanroom facility. Presently, many companies are vertically integrated and bear the full cost of their fabs themselves. However, a small number of companies is currently offering cleanroom access to other so-called fabless customers. In this business model such companies do process development for a customer’s devices. This kind of foundry operation makes it possible to develop a product without having to build your own cleanroom, which leads to a significant capital cost reduction. The process development costs, which can be in the range of several million Euros, are still specific for the customer’s product, however. These companies are custom foundries. In a generic foundry the costs of the process development are also shared by many users, and low fabrication costs can be realised at low volume. Because the generic process is used by a large number of customers it is worth the effort of needed to create dedicated design kits with accurate models for the building blocks and powerful simulation engines. Working in this way, PIC prototypes can be achieved cost effectively in a very small number of design and fabrication cycles. This in itself will lead to a dramatic reduction of the cost of both PIC R&D and manufacturing.

 

How Generic Integration Technology Works

In Silicon micro-electronics a broad range of functionalities is realised from a rather small set of basic building blocks, like transistors, diodes, resistors, capacitors and interconnection tracks. By connecting these building blocks in different numbers and topologies we can realize a huge variety of circuits and systems, with complexities ranging from a few hundred up to over a billion transistors. In photonics we can actually do something similar. On inspection of the functionality of a variety of optical circuits we see that most of them consist of a rather small set of components: lasers, optical amplifiers, modulators, detectors and passive components like couplers, filters and (de)multiplexers. By proper design these components can be reduced to an even smaller set of basic building blocks. In a generic integration technology that supports integration of the basic building blocks we can realize a variety of functionalities.

basic_bb

Figure 3: Example of the functionalities that can be realised in a generic integration technology that supports four basic building blocks: Passive Waveguide Devices (PWD), (Optical) Phase Modulators (PHM), Semiconductor Optical Amplifiers (SOA) and Polarisation Convertors.

Figure 3 illustrates which functionalities can be realised in a generic Indium Phosphide technology that supports integration of three basic building blocks: passive waveguide devices (PWD), phase modulators (PHM) and Semiconductor Optical Amplifiers (SOA). With these building blocks a variety of modulators, switches and lasers can be realised. Most of the examples in figure 3 have been reported in the scientific literature. Figure 4, for example, shows a photograph of an integrated discretely tuneable laser with nanosecond switching speed, useful for packet switching applications, which has recently been developed in a generic technology by the COBRA institute of the TU Eindhoven. The schematic on the left shows how the laser is composed of only two basic building blocks: passive waveguides in the MMI-coupler, the AWG demultiplexer and the interconnections, and Semiconductor Optical Amplifiers for amplification and switching. Chip dimensions are 1.5 x 3.5mm2.

AWG_laser

mask_AWGL

Figure 4: Circuit scheme and microscope photograph of a fast discretely tuneable laser with 100GHz channel spacing which has recently been realised in the COBRA InP-based generic integration process. Chip dimensions are 1.5 x 3.5mm2 [6].

An advantage of generic integration technologies is that, because they can serve a large market, they justify the investments in developing the technology for a very high performance at the level of the basic building blocks, which will make circuits realised in this technology highly competitive. This performance will not apply for every application, of course. Just like in CMOS different classes of applications need different processes, e.g. for high-voltage, high power or low power, high speed etc. In a similar way generic photonic processes will need a few different generic technologies, optimized for different kinds of applications, to cover a major part of all applications. In a fully-fledged generic integration technology we will need a few additional building blocks, like polarisation converters for on-chip handling and control of polarisation, DBR gratings as on-chip reflectors, and Fibre Mode Adapters for low-loss coupling to fibres. And we might also want a process with compact Electro-Absorption Modulators instead of the longer phase modulators. But the number of basic building blocks will remain pretty small, and the number of generic technologies required is far smaller than the number of technologies which are presently in use.

Today several companies in Europe have integration processes that are suitable as a starting point for development of a truly generic integration process. What is missing still is the organizational and software infrastructure essential for providing easy and low-cost access.

 

Roadmap

The roadmap of microelectronics is focused on progress along the Moore’s law curve. In Photonics we expect a different development. It will start with commercial application of ASPICs with a complexity in the range of 5-50 components in rather basic generic foundry processes. The next step will be an increase in performance and capabilities of the generic processes, e.g. with respect to speed, power consumption and number of basic building blocks supported, which may lead to some increase in the complexity of the chips, but not dramatic. Once the foundry processes cover a wide range of applications, their steady performance improvement will allow for designing increasingly complex chips.

It seems unlikely that the complexity supported by the generic processes, as described here and developed by EuroPIC, will exceed a component count of 1000 for a number of reasons. First, SOAs and lasers typically have a power dissipation of several 100mW. So their number is typically restricted to several tens up to a maximum of a few hundreds, because of heat sinking limitations. Secondly, although they often carry digitally modulated signals, the basic building blocks and the circuits built from them essentially operate in an analogue mode, which means that on passing a number of components the signal will accumulate noise and distortion and need to be regenerated. Regenerators can be integrated too, but they consume space and power.

Finally, from the point of view of functionality it is difficult at the moment to imagine what circuits would need more than a thousand components. WDM devices might go up to one hundred channels, but in order to arrive at one thousand components they would need 10 components per channel, which looks rather high; what should they do? For devices without a huge parallelism it is even more difficult to think of such large circuits.

The final outcome of the EuroPIC programme will be to have carried out two trial runs of the new generic foundry process. Partners Oclaro Technology plc in the UK, and the Fraunhofer Inst. for Telecommunications Heinrich Hertz Institute in Germany will each establish their own generic process. Processes which at this stage will have different strengths but may well converge in capability in the future. To ensure that these are real tests against real market requirements, EuroPIC is working closely with applications orientated groups within the project. The first trials will proceed with PIC designs supplied by applications partners in the consortium, and aim to test out the generic process from end to end for the first time. They will reveal any major unforeseen problems. The second run starting mid 2011 will properly demonstrate the technical feasibility of the generic approach and resolve the issues which have arisen in the initial trials.

It is by working through such programmes as EuroPIC and the Dutch national programme MEMPHIS (on the development of an industrial generic foundry capability, including software design toolkits for fast and accurate chip design, and generic packaging and test facilities, that commercial, self-sustaining photonic foundry operation might be achieved. Through EuroPIC, restricted access to alpha and then beta platform releases may begin as early as 2011.

 

User Group Info

EuroPIC invites interested parties to join its user group. The term user is applied broadly to any academic group or commercial company, small or large, which has the potential for using PICs in its technology. Although EuroPIC is particularly focussed on supporting SME users, the door is open to all interested parties.

Through contact with the consortium potential users will gain insight into how a generic fab could work for them and assistance with translating their requirements into an InP technology context.

Interaction between the consortium and the users will be policed via a two way NDA specifically design for this purpose.

Through its SME User Group, which will be expanded through an active dissemination policy, EuroPIC expects to be able to address a variety of markets in which the costs of PICs are presently prohibitive for broad application. In the project we have included a number of pilot applications, representative for different markets, with a potential for large growth: sensors, data-interconnect, telecommunications and bio-imaging. Our target is to expand the group of potential users to more than 100 at the end of the project.

If you are interested please contact

Mar van der Hoek

 
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