This project is funded by the 7th Framework Programme of the EC This project is funded by the 7th Framework Programme of the EC
The EuroPIC project is coordinated by COBRA The EuroPIC project is coordinated by COBRA
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Applications

Large reductions in R&D cycle time and chip manufacturing costs will lead to a large growth of the share of Application Specific PICs (ASPICs) in the photonic components market. So far the use of PICs has been mainly restricted to a few niche areas in high-end telecommunications applications, where their specific functionality cannot be met by competing technologies. With the expected cost reductions through a generic foundry approach they will also become competitive in high volume markets like the telecom access network, where they may be applied in the Central Office for integration of larger numbers of circuits that have to be repeated for each subscriber or group of subscribers. In future 10Gb/s access network they may become competitive also in the subscriber transceiver module.

But when chip costs drop photonic chips will increasingly penetrate also other applications. A good example is the fibre sensor market, which amounted 300M$ in 2007 with double digit annual growth figures. Fibre based sensors play a key role in reducing environmental hazards by monitoring the integrity of large constructions like bridges, dikes, roofs of large buildings, windmill propeller blades, large reservoirs for storage of oil or chemicals, offshore platforms etc. According to an OIDA forecast of April 2007 this market will exceed €1Bn in volume in 2011. A significant part of the sensor costs is in the readout unit, which contains a light source, a detector and some signal processing circuitry. Here Photonic ICs could replace a significant part of existing modules, and also allow sensors to be designed using novel principles. Examples are various types of strain sensors, heat sensors and a variety of chemical sensors.

Medical applications. The wavelength window around 1500nm, which can be addressed with InP-based ASPICs, is particularly relevant for the diagnostic analysis of opaque tissue, because the penetration depths at these wavelengths are a factor of three higher than in the near IR window around 800nm, up to a few millimeters, due to lower scattering losses in the tissue. This is particularly relevant for analysis of suspect skin tissue or intra-arterial diagnostics, using techniques like Optical Coherence Tomography (OCT) or Raman Scatterometry. The market for OCT equipment presently exceeds €200M. The market for Raman scatterometry is a factor of ten smaller, but if it were possible to integrate the Raman sensor on an InP-chip at a cost of a few hundred €, it may be applied in a tool that will be in the standard diagnostic toolkit of a significant part of the medical profession.

Another interesting class of devices are pico or femtosecond pulse lasers. Here PICs containing mode locked lasers, optionally combined with pulse shapers, can provide small and cheap devices that can be used in widely differing applications, such as high-speed pulse generators and clock recovery circuits, ultrafast AD-converters using multi-wavelength pulse trains for reducing the sampling rate with photonic serial-parallel conversion, and in multi-photon microscopy.

With the increasing processor speeds the need for photonic interconnect in computer backplanes is rapidly increasing and not only the interconnection, but also the switching should be performed in the optical domain. Fast photonic switches for Terabit server backplanes, HPC and multi-core architecture connections constitute a huge potential market for PICs that will be addressed by a EuroPIC switch ASPIC. The market size for server backplanes is estimated to be ~$150M in 2008 and predicted to be $800M by 2012. On board interconnects are anticipated to have a $4Bn market by 2012.

So far, telecommunications has been the main driver for PIC development. In particular, the access market is interesting for a foundry approach because of the large volume of this market. EuroPIC addresses ASPIC designs for access networks, for application in a WDM Fibre-to-the-Home (FTTH) network, and for Radio-over-Fibre (RoF) applications in wireless access. The WDM FTTH application addresses development of a chip that runs the communication with 20-40 subscribers in the Central Office. Several millions of these chips will be required if such a network approach is applied Europe wide. Impressive numbers of chips will also be required for RoF applications for in-building distribution of radio signals for wireless access.

These are just a few examples. Once Application Specific Photonic ICs and their development get really cost-effective they will enter into many advanced products in many applications areas, offering ample opportunities for small and larger companies to improve their competitiveness by applying ASPICs in their products.

 

Project Methodology: A foundry approach

Historical Perspective: The EpixNET Integration Platforms

In September 2004 the European Network of Excellence on Photonic Integrated Components and Circuits, ePIXnet (www.epixnet.org) started with a healthy mix of academic and industrial partners on an ambitious mission: to move from a model of independent research to a model of integrated research with shared use of expensive technological infrastructure. In the background were the steadily increasing costs of cleanroom facilities that restricted Photonic Integration research to the ever smaller group of institutes that could afford a cleanroom. The idea was to enlarge the group of users by stimulating cleanroom owners to organise access to their facilities for a broader circle of non-cleanroom owning partners. After experimenting for two years with facility access ePIXnet founded integration technology platforms. Two major integration technologies were identified: InP-based integration technology, which supports the highest degree of functionality, including compact lasers and amplifiers, and Silicon Photonics technology, which offers most of the functionality offered by InP except for the compact lasers and amplifiers, but at a potentially better performance and lower cost because of its compatibility with mature CMOS technology. Later a third platform with dielectric waveguide technology was added, which offers low-loss and high-quality passive optical functions and some thermo-optic active functions, through the whole wavelength range from visible to infrared. In addition to these three integration platforms, ePIXnet established four supporting platforms: for nanolithography, for packaging, for high-speed characterization, and for massive cluster computing. From the beginning it was intended that the ePIXnet platform activities should survive after the expiration of EU network funding by the end of 2008; which has indeed happened.

In summary three major generic integration technologies have been made accessible at a research level to a broad circle of users, by setting up so-called integration technology platforms:

JePPIX (www.jeppix.eu , coordinator@jeppix.eu): The InP-based technology platform is supported by a consortium containing Europe’s key players in the field of InP-technology: chip manufacturers, Photonic CAD companies, equipment manufacturers and research institutes. It is coordinated by the TU Eindhoven and offers small-scale access to its generic integration process, for research purposes and proof-of-concept.

ePIXfab (www.epixfab.eu , pieter.dumon@imec.be): The Silicon Photonics platform is presently supported by Europe’s major CMOS research institutes IMEC and LETI and coordinated by the University of Gent. It offers low-cost shared access to processes for high quality silicon photonic ICs to an increasing number of customers, also from outside.

Triplex (http://www.lionixbv.nl/download/pdf/flyertriplex.pdf , info@lionibv.nl): The third platform, supported by the Dutch company Lionix and the University of Twente, provides access to its flexible Triplex dielectric (glass) waveguide technology (SiO2 and Si3N4).

EuroPIC Methodology

EuroPIC builds on the groundwork of the JePPIX platform which started by offering small scale access to the COBRA generic integration process of the TU Eindhoven. This process is very useful for proof-of-concept experiments, but does not support reproducible fabrication of larger numbers of PICs with sufficient performance for practical applications. EuroPIC will develop this concept much further by integrating a larger number of basic Building Blocks with higher performance in an industrial process, thus supporting greater functionality, better performance and larger circuit complexity, both for small and large volume production, and pave the way for a generic photonic foundry service. EuroPIC enables Europe to lead in this development.

To reach the project goals is the EuroPIC consortium will:

• Decompose the functionality of complex photonic micro-systems into a small set of basic functions.

• Develop a Building Block for each of the basic functions and to develop production processes capable of integrating the basic Building Blocks in any arbitrary combination and number.

• Develop a dedicated design kit that contains an accurate model of the performance of the basic Building Blocks and that can simulate the response and the performance of complex circuits built from these building blocks.

• Develop dedicated measurement tools and vehicles for testing the quality and performance of the basic Building Blocks, in such a way that testing the performance of complex circuits is reduced to proper testing of the basic Building Blocks.

• Test the foundry concept with examples of high complexity ASPICs.

• Develop a small set of generic packages that can be used for a broad class of PICs, by introducing standardization in the positions of optical and electrical connections, in chip dimensions and positioning of heat generating elements.

 

The manufacturing chain

EuroPIC envisages a holistic approach that addresses the full development chain from idea, via design, software based design tools, fabrication, packaging and testing to application. The programme also allows for some technology development and the testing of new platform capability in order to learn how to introduce new building blocks to the platform. The figure below illustrates the scope of EuroPIC in the end-to-end process context.

chain

EuroPIC and the component manufacturing chain

EuroPIC very broadly based consortium. We have partners whose skill sets collectively reach from applications specialists though design and design tools specialists to chip fabrication and package and test. The photonics industry is also represented by organisations such as EPIC.

It will be necessary for the partners to work very closely together to achieve the objectives of the work plan.

In summary, the EuroPIC partners have identified five key tasks within the programme:

• Develop a generic process flow for PICs with integrated design tools and test methodology into it.

• Show feasibility of the generic fab approach using chip designs from real applications

• Develop a business model and IP environment for the generic fab model. Develop road map for platform release.

• Expand the designer base and the user/applications base in industry

• Prepare key process building blocks ready for platform introduction and steer the platform roadmap.

 

Key Tasks Within EuroPIC

The EuroPIC partners have identified five key tasks within the programme:

• Develop a generic process flow for PICs with integrated design tools and test methodology into it.

• Show feasibility of the generic fab approach using chip designs from real applications

• Develop a business model and IP environment for the generic fab model. Develop road map for platform release.

• Expand the designer base and the user/applications base in industry

• Prepare key process building blocks ready for platform introduction and steer the platform roadmap.

Successful execution of the five key tasks will at the end of the programme result in:

• Realisation of ASPICs in InP using a continuous (integrated) industrial process flow from concept to realisation.

• Demonstration of:

Process integration and process integration methodology

Design for manufacture using a (process) knowledge base integrated within the design tools H

igh throughput micro-manufacturing chain

Validation in industry

 
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