This project is funded by the 7th Framework Programme of the EC This project is funded by the 7th Framework Programme of the EC
The EuroPIC project is coordinated by COBRA The EuroPIC project is coordinated by COBRA
Home About EuroPIC

Project Aim

It is the aim of the project to bring the application of photonic integrated circuits and micro-systems in advanced products within reach for a broad class of SMEs by reducing their required investment costs by more than an order of magnitude. This will be done by developing a knowledge-based technology for production of Photonic Integrated Circuits (PICs) that will combine an increase in flexibility with a dramatic reduction of cost. It will lay the foundation for a breakthrough of PICs into a wide range of applications. With this aim, a consortium  consisting of Europe’s leading PIC manufacturers, photonic CAD companies and InP-semiconductor research laboratories has joined forces with a number of pilot users, both SMEs and larger companies.


Project Concept

Innovation is the key to growth, competitiveness and thus social well-being in the 21st century. In order to face the challenges of globalisation, Europe needs to integrate research, product development and business innovation to stand out as a world-class innovation-orientated economy. Today, Europe has excellent education and research institutions; however their representatives are often isolated from the business world and do not together reach the "critical mass" necessary for innovation. European SMEs must play a key role in these developments, as they are the driving factor for economic growth and innovation. One of the key areas for innovation is the field of photonics, which is changing the way we work and communicate fundamentally.

InP-based technology is the clear enabler of next generation photonics – all of the required optical functions can be created on an InP-based chip. However, the cost of entry into the photonics field is high due to capital investments in equipment and cleanrooms, process development and operational cost of such a setup. EuroPIC is about to change the way research institutes, SMEs and the industry work together in the field of photonic micro-systems based on Indium Phosphide (InP) fabrication technologies. A completely new business model will be developed and introduced, resulting in the availability for European companies and institutes of the required production methods and tools. This will also bring significant benefits to the new Eastern European member states where little or no investment in photonic fabrication infrastructure has taken place, by allowing new SMEs from these countries to compete in developing novel or improved photonic applications.

The concept of the project is simple: use the innovation capability of photonics SME by enabling access to a shared production facility, in which the technological boundaries are pushed forward by joint research in combination with Europe's leading research groups.

EuroPIC intends to apply a generic foundry approach to the design and fabrication of photonic integrated circuits.


EuroPIC Objectives

EuroPIC is a broadly based project, aiming to synthesise many of the functional components in the manufacturing chain. The project aims:

• To bring the application of photonic integrated micro-systems with a high added value in advanced products within reach for a broad class of SMEs by reducing the entrance costs dramatically by more than one order of magnitude.

• To enable the emergence of a new field of research in circuit-based photonic devices with ever increasing complexity and performance. To demonstrate this, a number of target application PICs will be produced and some of these will constitute “hero” experiments, with a record combination of complexity and performance realized in a vastly reduced development time.

• To investigate novel technologies for extending the functionality supported by a basic manufacturing process.

• To shorten the R&D cycle time significantly by developing a software design kit with accurate models of the basic building blocks and their performance.

• To develop a generic test methodology that allows for a significant reduction of the effort required for testing and qualification, by testing the basic building blocks rather then specific PICs.

• To develop a generic packaging approach that allows for packaging a variety of different PICs with a small set of standardized packages.

• To develop a business model for a rapid but evolutionary introduction of the generic foundry approach in a number of application field, mainly by and for SMEs.


Research Challenges for EuroPIC

The fundamental concept within EuroPIC is that of the generic process as applied to InP-based PICs. This is a radical departure from current practice because a generic process, by definition, is application-blind in that it should be capable of producing any circuit design providing the design lies within certain defined boundaries. In such a generic process there would no longer be the requirement for technologists to hand-craft processes to deliver PICs to a specific design which is the normal practice in the research literature (and indeed in industrial R&D) today, and which inevitably leads towards high development and production costs. A true generic process for InP PICs does not currently exist anywhere in the world and there are very significant challenges which must be overcome to achieve it. These will require research to achieve advances in the state-of-the-art on several levels:

• technology research on materials processing in the InP semiconductor system and its alloys InGasAsP and InGaAlAs.
• technology research at the basic building block level to ensure maturity and assess tolerance windows
• research on process integration
• research on supply chain integration

In EuroPIC there is considerable novelty in the chip designs themselves, many of which have not been made before, and we expect that the PICs that result will in themselves be state-of-the-art in terms of performance and complexity.

The EuroPIC philosophy is based on the belief that we can evolve from existing InP-based building blocks to a generic process by making strategic advances on technology that is available today and by developing new ways of combining functionality on a chip. Rather than pursuing small incremental technology steps, we will adopt the more challenging approach of parallel research by providing a working platform as a test bed, while working to define the shape of the platform to come.

Research on material processing

Research into new processes in any field of scientific endeavour is a complex and challenging task. In a relatively mature field such as InP based photonics past experience has shown that issues often arise from rather subtle interactions between different process stages: the difference between devices fabricated on semi-insulating substrates and doped substrates, for example, which is now compounded by the presence of other building blocks on the same chip, and in crystallographic constraints on layout and device orientation which may mean that conventional design choices are incompatible. There are also known challenges to be met in processes which make use of new material combinations such as AlGaInAs:InP (e.g. preventing Al oxidation), and in previously unanticipated device configurations.

Research on building block maturity

Short turn-around times for a trajectory from concept to scalable production requires mature and reliable building blocks with established design windows for the degrees of freedom available to designers. Reducing the performance specifications is; however, not an option – in most cases high performance is needed to create commercially viable products. Investigation of trade-offs between performance and the generality of the platform are therefore important research topics.

Research on process Integration

Through technology convergence driven by commercial pressures in application markets we expect the generic platforms supported by different fabs to evolve (converge) in the long term to look quite similar to the external observer, much like the position in silicon IC processing today. Generic foundry processes and packaging require a long-term roadmap in which added technology capabilities are matched by suitable cost models.

Research on supply chain integration

The generic fab requires a fresh look at the whole process chain from concept to packaged chip. Many of the elements in the chain are currently missing and must be created. For example, novel software design methods and tools are required at the circuit level and the generic fab process itself needs to be developed along with complementary generic packaging approaches. Very often in the past, packaging has been left as an afterthought. In EuroPIC, chip “packageability” will be designed in from the start. To remedy all of these deficiencies is beyond the scope of a single programme but we can address enough of them to be confident that a commercial release of the first generic InP foundry process will be achievable.

More Articles...